1. Field of the Invention
This invention relates generally to processor-based systems, and, more particularly, to inserting synchronized errors in processor-based systems.
2. Description of the Related Art
Processor-based systems may be used in a wide variety of settings. For one example, businesses may use processor-based systems to perform a multiplicity of tasks including, but not limited to, developing new software, maintaining databases of information related to operations and management, and hosting a web server that may facilitate communications with customers. Process-based systems may also be used to organize personal schedules, transmit information around the globe, monitor and provide therapies to internal organs, and navigate satellites, to name only a few more possible uses.
Processor-based systems may, however, be prone to errors that may compromise the operation of the system. For example, a software package running on a processor may request access to a memory location that may already have been allocated to another software package. Allowing the first program to access the memory location could corrupt the contents of the memory location and cause the second program to fail, so the system may deny the first program access and return a system error message. The first program may then fail, perhaps disrupting the operation of the processor and/or the network. Similarly, disconnected power cables, pulled connection wires, and malfunctioning hardware may also disrupt operation of the system.
As it may not generally be possible or desirable for a user to intervene to correct the error, many processor-based systems may be designed to recover from errors without external assistance. Such systems, often referred to as fault tolerant systems, may be particularly useful in complex time-sensitive applications such as implantable medical devices, airplane navigation systems, World Wide Web network hubs, and the like. To test the reliability of a fault tolerant system, individual errors may be created and provided to the system, a method generally referred to as fault insertion. For example, one or more components of the fault tolerant system may be deliberately powered down to test the ability of the system to recover from a power failure in the one or more components.
Traditional fault insertion methods may provide single errors to test the system. This approach may not, however, provide an accurate characterization of the system's ability to recover from a plurality of errors that may occur in sequence or substantially simultaneously. For example, a single mid-range server system may be used for developing new software, maintaining databases of information related to operations and management, and hosting a web server. The mid-range server system may thus be subject to complex sequences of errors generated by the plurality of software applications and hardware components in the system. Traditional fault insertion may not be capable of testing the ability of the system to recover from sequences of errors produced by components of the system.